Intel shipped High-NA with an escape hatch. TSMC is living in it.

The most expensive chipmaking tool ever sold went into real production this week. Within a day, the world’s biggest contract chipmaker made clear, for the third year running, that it still isn’t buying the argument.

Three announcements landed inside 48 hours. On Wednesday, Intel and ASML announced that Intel had become the first company to ship high-volume logic chips patterned with High-NA EUV lithography: select layers of its Panther Lake processors on the 18A node, as Tom’s Hardware reported. The same morning, ASML posted €9.3 billion in second-quarter sales and raised its full-year outlook for the second time in 2026. Its shares fell anyway, per CNBC.

Then on Thursday, TSMC reported a record gross margin and pledged another $100 billion for Arizona, aimed at fabs running exactly the node classes TSMC insists don’t need the new machine.

Covered separately, those are three decent stories. Read together, they are a single argument about whether ASML’s TWINSCAN EXE, a scanner that lists at roughly $380 million, is worth owning yet.

What Intel actually shipped

Strip the varnish and Wednesday’s milestone is real, and narrower than it sounds. Intel Foundry is exposing select Panther Lake layers — the chips sold as Core Ultra Series 3 — on High-NA scanners in Hillsboro, Oregon, where the first EXE:5000 was installed in 2024. Yields on those layers, per the joint announcement, match what ASML’s standard 0.33 NA machines deliver, and the chips are shipping to customers. Intel executive vice president Naga Chandrasekaran said the milestone shows High-NA “can be integrated into advanced semiconductor manufacturing at scale.”

The operative phrase is dual-qualified. Every High-NA layer on Panther Lake is also qualified on the older NXE platform; wafers from either toolpath are interchangeable. That is genuinely difficult process engineering. It is also, by construction, an escape hatch. If the $380 million machines don’t pay their way on throughput, uptime, and cost per wafer, Intel can quietly route those layers back to scanners it already owns, and no customer would notice.

The bet that can’t be unwound comes next. Intel’s 14A node, the one after 18A, has been designed to use High-NA on its tightest-pitch layers. Intel has announced no dual path there.

18A is the hedge. 14A is the bet.

A raise the market shrugged at

ASML’s quarter was, on paper, hard to fault. Sales of €9.3 billion and a 54 percent gross margin both came in above the company’s own guidance; net income was €2.9 billion; the full-year forecast rose to €43–45 billion, with third-quarter sales guided at €11–12 billion. It was, as CNBC noted, the second guidance hike this year. The stock fell on the news.

One caveat before reading too much into that. The drop came amid a broad slide in AI and chip names, per Seeking Alpha, and ASML was still up more than 50 percent on the year going into the print. It also rhymes with April, when the stock sank despite strong earnings and guidance as China export restrictions tightened. Markets have plenty of reasons to sell a stock trading near records.

But look at what powered the quarter. CEO Christophe Fouquet said the beat was “driven primarily by higher than expected Installed Base Management sales”: service and upgrades on machines already bolted to fab floors. And the expansion ASML laid out is for the old platform, with low-NA EUV capacity planned to rise 30 percent in 2027 and another 30 percent under study for 2028. High-NA got a readiness press release. The guidance math runs on 0.33.

The customer who keeps saying not yet

TSMC’s Thursday was the loudest of the three. Net income of NT$706.56 billion, about $22.35 billion, up 77.4 percent year over year; a record 67.7 percent gross margin; high-performance computing now 66 percent of revenue, per Tom’s Hardware. CEO C.C. Wei committed another $100 billion to Arizona for at least four more fabs at “2-nanometer and below technologies,” lifting TSMC’s total U.S. pledge to $265 billion. The pace of construction, the company said, will be set by market demand. This year’s capex is set at $60–64 billion, 70 to 80 percent of it for advanced processes.

What that money conspicuously does not include is a High-NA production line. The refusal has a paper trail. In April 2024, TSMC’s Kevin Zhang told the company’s technology symposium that A16, the 1.6nm-class node, won’t need the new scanners. In May 2025 he extended that to A14, the 1.4nm class, saying the company’s technology team “continues to find a way to extend the life of current EUV while harvesting the scaling benefit.”

“Whenever we see High-NA will provide meaningful, measurable benefit, we will do it.” — Kevin Zhang, TSMC, May 2025

By this June the position had softened only in the lab. At TSMC’s shareholder meeting, Wei confirmed the company has bought High-NA tools for R&D, saying it would be “a bit embarrassing to say how many,” and said moving them into production is a cost decision, not a capability one, as TrendForce reported.

That is the entire dispute in miniature. Nobody at TSMC argues the machine can’t print. They argue that more exposures on cheaper, long-since-depreciated scanners still beat fewer exposures on a $380 million one, and that the crossover hasn’t arrived. Multi-patterning costs real money in extra masks and extra steps. So does a $380 million scanner.

Two hedges, one question

Our read: Wednesday settled the engineering question and left the economic one untouched. Intel proved High-NA can print sellable silicon at matching yields, and structured the proof so it loses little if the economics never work. TSMC is running the same hedge in reverse, parking an undisclosed number of scanners in a lab while its production lines sweat tools it has already paid off. Two chipmakers, one on each side of the trade, both waiting for the same data.

The data arrives with the next nodes. TSMC has penciled in A14, built to avoid High-NA, for production around 2028. Intel’s 14A, built around it, targets roughly the same window. Only when both exist as silicon, with foundry price lists attached, will anyone know whose cost-per-wafer math was right. Until then, the most advanced lithography machine on earth sits in Oregon printing layers that, by Intel’s own qualification paperwork, an older and cheaper machine can print just as well.